Senior UFS Design Verification Engineer
Hyderabad, TS, IND
7h ago

Our vision is to transform how the world uses information to enrich life for all.

Join an inclusive team passionate about one thing : using their expertise in the relentless pursuit of innovation for customers and partners.

The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible.

We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing.

JR4169 Senior UFS Design Verification Engineer

Job Description

Position Title : Senior UFS Design Verification Engineer

Job Requirements

  • An expert level experience with UFS sub-systems.
  • Highly experienced with defining block, sub-system and SOC top level test plans.
  • An expert level with developing UVM-based SV test-benches.
  • Deep understanding and knowledge of verification methodologies flows and quality metrics.
  • Great debugging and problem-solving skills.
  • Team player with great interpersonal communication skills.
  • Job Qualifications

  • At least 5 years of relevant experience in UFS SoC verification.
  • Strong and relevant expertise with ASIC simulation tools and advanced verification methods.
  • Expert level in verification languages such as UVM and System Verilog.
  • Relevant experience with writing block-level and SoC test-plans.
  • Education : B.S. in electrical engineering, computer science with extensive industry experience.
  • Report this job

    Thank you for reporting this job!

    Your feedback will help us improve the quality of our services.

    My Email
    By clicking on "Continue", I give neuvoo consent to process my data and to send me email alerts, as detailed in neuvoo's Privacy Policy . I may withdraw my consent or unsubscribe at any time.
    Application form